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Improving the Sending Per-Packet Processing Overheads for High-Speed Network Using Specialized RISC Processor

المصدر: المجلة الجامعة
الناشر: جامعة الزاوية - مركز البحوث والدراسات العليا
المؤلف الرئيسي: Elbeshti, Mohamed A. (Author)
المجلد/العدد: مج19, ع2
محكمة: نعم
الدولة: ليبيا
التاريخ الميلادي: 2017
الشهر: أبريل
الصفحات: 25 - 42
رقم MD: 1263433
نوع المحتوى: بحوث ومقالات
اللغة: الإنجليزية
قواعد المعلومات: EduSearch, EcoLink, IslamicInfo, AraBase, HumanIndex
مواضيع:
كلمات المؤلف المفتاحية:
Large Sending Offload (LSO) | RISC Core | VHDL Behavior Model | Cycle-Accurate Performance Evaluations
رابط المحتوى:
صورة الغلاف QR قانون
حفظ في:
LEADER 02331nam a22002657a 4500
001 2016088
041 |a eng 
044 |b ليبيا 
100 |9 673147  |a Elbeshti, Mohamed A.  |e Author 
245 |a Improving the Sending Per-Packet Processing Overheads for High-Speed Network Using Specialized RISC Processor 
260 |b جامعة الزاوية - مركز البحوث والدراسات العليا  |c 2017  |g أبريل 
300 |a 25 - 42 
336 |a بحوث ومقالات  |b Article 
520 |b  The promise of 40 and 100 gigabit Ethernet in the near future shows that the processing needed for a network protocol is scaling at least as quickly as communication speed. To keep up with this rapid increase in speed, the end nodes have to increase the amount of the packet processing to avoid the bottleneck in the network. Large Sending Offload LSO is a defacto standard, which is offloaded to network interface for sending packets up to 10 Gbps. In this paper, we have provided an appropriate approach that can scale the LSO to high-speed communication line beyond the 10 Gbps. A specialized cost-effective RISC core with low rate power has been designed to execute the new scheme for the LSO to support communication rate up to 100 Gbps. Other devices are; also implemented to support the RISC like the DMA. The processing cycles that the RSIC needed for TCP/IP and UDP/IP has been measured. The RISC’s performance is also presented. A moderate rate with 423 MHz RISC core can support the sending-side processing for up to 100 Gbps transmission speed for the TCP/IP and UDP/IP protocols. A DMA with 2115 MHz is applied in order to reduce the idle cycles of the RISC core. 
653 |a هندسة الحاسبات  |a معالجة البيانات  |a أمن المعلومات  |a بروتوكولات الشبكات 
692 |b Large Sending Offload (LSO)  |b RISC Core  |b VHDL Behavior Model  |b Cycle-Accurate Performance Evaluations 
773 |4 العلوم الإنسانية ، متعددة التخصصات  |6 Humanities, Multidisciplinary  |c 010  |e University Bulletin  |l 002  |m مج19, ع2  |o 0928  |s المجلة الجامعة  |v 019 
856 |u 0928-019-002-010.pdf 
930 |d n  |p y  |q n 
995 |a EduSearch 
995 |a EcoLink 
995 |a IslamicInfo 
995 |a AraBase 
995 |a HumanIndex 
999 |c 1263433  |d 1263433 

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