A Heuristic Fault Based Optimization Approach To Reduce Test Vectors Count In VLSI Testing
| المصدر: | مجلة جامعة الملك سعود - علوم الحاسب والمعلومات |
|---|---|
| الناشر: | جامعة الملك سعود |
| المؤلف الرئيسي: | Khera, Vinod Kumar (Author) |
| مؤلفين آخرين: | Sharma, Ravi K. (Co-Author) , Gupta, A. K. (Co-Author) |
| المجلد/العدد: | مج31, ع2 |
| محكمة: | نعم |
| الدولة: |
السعودية |
| التاريخ الميلادي: |
2019
|
| الصفحات: | 229 - 234 |
| DOI: |
10.33948/0584-031-002-008 |
| ISSN: |
1319-1578 |
| رقم MD: | 974622 |
| نوع المحتوى: | بحوث ومقالات |
| اللغة: | الإنجليزية |
| قواعد المعلومات: | science |
| مواضيع: | |
| كلمات المؤلف المفتاحية: |
VLSI Testing | Essential Fault Based Test Vector | Optimization | Independent Fault Based Test Vector | Optimization | Test Vector Count
|
| رابط المحتوى: |
| LEADER | 02108nam a22002537a 4500 | ||
|---|---|---|---|
| 001 | 1717360 | ||
| 024 | |3 10.33948/0584-031-002-008 | ||
| 041 | |a eng | ||
| 044 | |b السعودية | ||
| 100 | |9 525812 |a Khera, Vinod Kumar |e Author | ||
| 245 | |a A Heuristic Fault Based Optimization Approach To Reduce Test Vectors Count In VLSI Testing | ||
| 260 | |b جامعة الملك سعود |c 2019 | ||
| 300 | |a 229 - 234 | ||
| 336 | |a بحوث ومقالات |b Article | ||
| 520 | |b In this work we have proposed a heuristic approach to reduce the test vector count during VLSI testing of standard ISCAS circuits. With the shrinking die-space and increasing circuitry on a single Integrated circuit, the number of test vectors required for testing is also increasing. The number of test vectors directly affects the total testing cost of a circuit. In this work fault based test vector optimization has been proposed. Here, test vectors have been reduced by extracting child test vectors and merging them. The proposed scheme helps in reducing the test vector count and has been tested successfully using single stuck at fault models. The results obtained illustrate the effectiveness of proposed scheme. © 2017 Production and hosting by Elsevier B.V. on behalf of King Saud University. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/). | ||
| 653 | |a علوم الحاسوب |a الخوارزميات |a اختبار ناقلات العد | ||
| 692 | |b VLSI Testing |b Essential Fault Based Test Vector |b Optimization |b Independent Fault Based Test Vector |b Optimization |b Test Vector Count | ||
| 700 | |9 47878 |a Sharma, Ravi K. |e Co-Author | ||
| 700 | |9 525462 |a Gupta, A. K. |e Co-Author | ||
| 773 | |c 008 |e Journal of King Saud University (Computer and Information Sciences) |f Maǧalaẗ ǧamʼaẗ al-malīk Saud : ùlm al-ḥasib wa al-maʼlumat |l 002 |m مج31, ع2 |o 0584 |s مجلة جامعة الملك سعود - علوم الحاسب والمعلومات |v 031 |x 1319-1578 | ||
| 856 | |u 0584-031-002-008.pdf | ||
| 930 | |d y |p y | ||
| 995 | |a science | ||
| 999 | |c 974622 |d 974622 | ||
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